Using I2C FIFO

FIFO will enhance the performance of i2c,
Mutli byte transfer.
If slave device is having something like 32 bit of register address and data.

Below is an example of reading a i2c slave register.
Register address and data is 32 bits wide.

When FIFO is disabled it took 2.47 ms to complete the entire transaction compared to 391 us when FIFO enabled.

I2C Clock Stretching

Clock stretching is a phenomenon where the I2C slave pull the SCL line low on the 9th clock of  every I2C data transfer (before the ACK stage). This is done to inform the master that client is not ready for another transfer.

He is a classic example,

The exact verbatim of clk stretching from the i2c spec is as follows,

“After each acknowledge (A) or not-acknowledge bit (A) the active master disables its current-source pull-up circuit. This enables other devices to delay the serial transfer by stretching the LOW period of the SCLH signal. The active master re-enables its current-source pull-up circuit again when all devices are released and the SCLH signal reaches a HIGH level,”